Georgia Tech inventors have designed a two-stage cascoded Silicon-Germanium (SiGe) Heterojunction Bipolar Transistor (HBT) device. It employs an innovative layout structure where the HBTs operate in inverse mode comprising of emitter-base-collector-base-emitter configuration, thus allowing for optimal current density. The configuration results in an inverse-mode device operation with the physical junction of the emitter acting as the electrical collector and the physical junction of the collector acting as the electrical emitter. The sub-collector of the C-E device and the sub-collector of the inverse mode device are shared and behave as the connection between the emitter and collector in the cascode structure. This design is also favorable for fabricating cascoded transistor device stages in electronic circuitry.
- Enables optimal current density during operation
- Simplified fabrication of cascoded transistor device stages during semiconductor manufacturing
- Provides improved operational efficiencies in the overall electronics circuit design and topology
- Allows for better integration of the different elements and reducing the overall chip area for electronic circuits (Integrated Chips- IC)
- Radiation hardened circuitry in nuclear applications and space exploration
- Circuitry where space is at a premium and more transistors need to be packed into smaller areas on electronic circuits
The design of amplifiers for use in electronic circuitry has many variations. The C-B (common-base) amplifier design is used in wider bandwidth applications while the C-E (common-emitter) design is used when input impedance is a critical requirement. A design which precedes the C-B stage by a low gain C-E stage with moderately high input impedance is considered one of the more optimal configurations. The arrangement of transistors in this manner is known as the cascode configuration. It consists of amplifiers stacked in series, as opposed to cascaded arrangement used in a standard amplifier chain. The cascode amplifier configuration is a combined common-emitter and common-base design and has wide bandwidth capability along with moderately high input impedance characteristics.